Garg, R. (2010). Analysis and design of resilient VLSI circuits: Mitigating soft errors and process variations (1 edición.). Nueva York, Estados Unidos: Springer.
Chicago Style CitationGarg, Rajesh. Analysis and Design of Resilient VLSI Circuits: Mitigating Soft Errors and Process Variations. 1 edición. Nueva York, Estados Unidos: Springer, 2010.
MLA CitationGarg, Rajesh. Analysis and Design of Resilient VLSI Circuits: Mitigating Soft Errors and Process Variations. 1 edición. Nueva York, Estados Unidos: Springer, 2010.
Warning: These citations may not always be 100% accurate.