Minimizing and Exploiting Leakage in VLSI Design - Jayakumar, Nikhil; Paul, Suganth; Garg, Rajesh; SpringerLink (Online service) (New York, NY : Springer US : Imprint: Springer, 2010)
Leakage Reduction Techniques: Minimizing Leakage In Modern Day DSM Processes -- Existing Leakage Minimization Approaches -- Computing Leakage Current Distributions -- Finding a Minimal Leakage Vector in the Presence of Random PVT Variations Using Signal Probabilities -- The HL Approach: A Low-Leakage ASIC Design Methodology -- Simultaneous Input Vector Control and Circuit Modification -- Optimum Reverse Body Biasing for Leakage Minimization -- I: Conclusions and Future Directions -- Practical Methodologies for Sub-threshold Circuit Design: Exploiting Leakage Through Sub-threshold Circuit Design -- Exploiting Leakage: Sub-threshold Circuit Design -- Adaptive Body Biasing to Compensate for PVT Variations -- Optimum VDD for Minimum Energy -- Reclaiming the Sub-threshold Speed Penalty Through Micropipelining -- II: Conclusions and Future Directions -- Design of a Sub-threshold BFSK Transmitter IC -- Design of the Chip -- Implementation of the Chip -- Experimental Results.
Keywords: Electronic circuits; Computer-aided engineering; Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design