Network-on-Chip Architectures : A Holistic Design Exploration - Nicopoulos, Chrysostomos; Narayanan, Vijaykrishnan; Das, Chita R.; SpringerLink (Online service) (Dordrecht : Springer Netherlands : Imprint: Springer, 2010)
MICRO-Architectural Exploration -- A Baseline NoC Architecture -- ViChaR: A Dynamic Virtual Channel Regulator for NoC Routers [39] -- RoCo: The Row-Column Decoupled Router - A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks [40] -- Exploring FaultoTolerant Network-on-Chip Architectures [37] -- On the Effects of Process Variation in Network-on-Chip Architectures [45] -- MACRO-Architectural Exploration -- The Quest for Scalable On-Chip Interconnection Networks: Bus/NoC Hybridization [15] -- Design and Management of 3D Chip Multiprocessors Using Network-In-Memory (NetInMem) [43] -- A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures [44] -- Digest of Additional NoC MACRO-Architectural Research -- Conclusions and Future Work.
Keywords: Electronic circuits; Microprocessors; Circuits and Systems; Processor Architectures