Wafer Level 3-D ICs Process Technology - Tan, Chuan Seng.; Gutmann, Ronald J.; Reif, L. Rafael; SpringerLink (Online service) (New York, NY : Springer US : Imprint: Springer, 2008)
Overview of Wafer-Level 3D ICs -- Monolithic 3D Integrated Circuits -- Stacked CMOS Technologies -- Wafer-Bonding Technologies and Strategies for 3D ICs -- Through-Silicon Via Fabrication, Backgrind, and Handle Wafer Technologies -- Cu Wafer Bonding for 3D IC Applications -- Cu/Sn Solid#x2013;Liquid Interdiffusion Bonding -- An SOI-Based 3D Circuit Integration Technology -- 3D Fabrication Options for High-Performance CMOS Technology -- 3D Integration Based upon Dielectric Adhesive Bonding -- Direct Hybrid Bonding -- 3D Memory -- Circuit Architectures for 3D Integration -- Thermal Challenges of 3D ICs -- Status and Outlook.
Keywords: Electronics; Microelectronics; Optical materials; Electronic materials; Materials-Surfaces.; Thin films; Engineering; Electronics and Microelectronics, Instrumentation; Optical and Electronic Materials; Surfaces and Interfaces, Thin Films; Engineering, general