(2008). CMOS SRAM circuit design and parametric test in nano-scaled technologies: Process-aware SRAM design and test.
Citación estilo ChicagoCMOS SRAM Circuit Design and Parametric Test in Nano-scaled Technologies: Process-aware SRAM Design and Test. 2008.
Cita MLACMOS SRAM Circuit Design and Parametric Test in Nano-scaled Technologies: Process-aware SRAM Design and Test. 2008.
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