APA Citation

(2008). CMOS SRAM circuit design and parametric test in nano-scaled technologies: Process-aware SRAM design and test.

Chicago Style Citation

CMOS SRAM Circuit Design and Parametric Test in Nano-scaled Technologies: Process-aware SRAM Design and Test. 2008.

MLA Citation

CMOS SRAM Circuit Design and Parametric Test in Nano-scaled Technologies: Process-aware SRAM Design and Test. 2008.

Warning: These citations may not always be 100% accurate.