Design, analysis and test of logic circuits under uncertainty /
| Format: | Book |
|---|---|
| Published: |
c2013.
|
| Online Access: | Ver documento en línea |
| LEADER | 00561nam a2200121 a 4500 | ||
|---|---|---|---|
| 001 | 000735645 | ||
| 005 | 20250117153850.0 | ||
| 020 | |a 9789048196449 |q (ebook) | ||
| 040 | |a Sistema de Bibliotecas de Universidad de Costa Rica | ||
| 245 | 1 | 0 | |a Design, analysis and test of logic circuits under uncertainty / |c Smita Krishnaswamy, Igor L. Markov, John P. Hayes. |
| 260 | |c c2013. | ||
| 506 | |a Acceso al texto completo para la comunidad de la UCR por medio de la cuenta institucional | ||
| 856 | 4 | 1 | |u https://springerlink.proxyucr.elogim.com/book/10.1007/978-90-481-9644-9 |y Ver documento en línea |