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01573nam a22003255i 4500 |
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000282636 |
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20211108133253.0 |
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cr nn 008mamaa |
| 008 |
100301s2008 ne | s |||| 0|eng d |
| 020 |
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|a 9781402085864
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| 024 |
7 |
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|a 10.1007/978-1-4020-8586-4
|2 doi
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| 040 |
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|a Sistema de Bibliotecas del Tecnológico de Costa Rica
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| 100 |
1 |
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|a Boulé, Marc.
|e author.
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| 245 |
1 |
0 |
|a Generating Hardware Assertion Checkers :
|b For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring /
|c by Marc Boulé, Zeljko Zilic.
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| 250 |
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|a 1st ed. 2008.
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| 260 |
# |
# |
|a Dordrecht :
|b Springer Netherlands :
|b Imprint: Springer,
|c 2008.
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| 300 |
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|a XX, 280 p. :
|b online resource.
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| 336 |
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|a text
|b txt
|2 rdacontent
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| 337 |
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|a computer
|b c
|2 rdamedia
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| 338 |
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|a online resource
|b cr
|2 rdacarrier
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| 505 |
0 |
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|a Assertions and the Verification Landscape -- Basic Techniques Behind Assertion Checkers -- PSL and SVA Assertion Languages -- Automata for Assertion Checkers -- Construction of PSL Assertion Checkers -- Enhanced Features and Uses of PSL Checkers -- Evaluating and Verifying PSL Assertion Checkers -- Checkers for SystemVerilog Assertions -- Conclusions and Future Work.
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| 650 |
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0 |
|a Electronic circuits.
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| 650 |
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|a Computers.
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| 650 |
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|a Programming languages (Electronic computers).
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| 650 |
1 |
4 |
|a Circuits and Systems.
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| 650 |
2 |
4 |
|a Theory of Computation.
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| 650 |
2 |
4 |
|a Programming Languages, Compilers, Interpreters.
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| 700 |
1 |
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|a Zilic, Zeljko.
|e author.
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| 710 |
2 |
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|a SpringerLink (Online service)
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| 773 |
0 |
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|t Springer eBooks
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