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01959nam a22003255i 4500 |
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000284015 |
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20211118093317.0 |
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cr nn 008mamaa |
| 008 |
100301s2008 ne | s |||| 0|eng d |
| 020 |
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|a 9781402085888
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| 024 |
7 |
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|a 10.1007/978-1-4020-8588-8
|2 doi
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| 040 |
|
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|a Sistema de Bibliotecas del Tecnológico de Costa Rica
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| 245 |
1 |
0 |
|a High-Level Synthesis :
|b from Algorithm to Digital Circuit /
|c edited by Philippe Coussy, Adam Morawiec.
|
| 250 |
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|a 1st ed. 2008.
|
| 260 |
# |
# |
|a Dordrecht :
|b Springer Netherlands :
|b Imprint: Springer,
|c 2008.
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| 300 |
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|a XV, 297 p. :
|b online resource.
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| 336 |
|
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|a text
|b txt
|2 rdacontent
|
| 337 |
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|a computer
|b c
|2 rdamedia
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| 338 |
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|a online resource
|b cr
|2 rdacarrier
|
| 505 |
0 |
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|a User Needs -- High-Level Synthesis: A Retrospective -- Catapult Synthesis: A Practical Introduction to Interactive C Synthesis -- Algorithmic Synthesis Using PICO -- High-Level SystemC Synthesis with Forte's Cynthesizer -- AutoPilot: A Platform-Based ESL Synthesis System -- “All-in-C” Behavioral Synthesis and Verification with CyberWorkBench -- Bluespec: A General-Purpose Approach to High-Level Synthesis Based on Parallel Atomic Transactions -- GAUT: A High-Level Synthesis Tool for DSP Applications -- User Guided High Level Synthesis -- Synthesis of DSP Algorithms from Infinite Precision Specifications -- High-Level Synthesis of Loops Using the Polyhedral Model -- Operation Scheduling: Algorithms and Applications -- Exploiting Bit-Level Design Techniques in Behavioural Synthesis -- High-Level Synthesis Algorithms for Power and Temperature Minimization.
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| 650 |
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0 |
|a Electronic circuits.
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| 650 |
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0 |
|a Microprocessors.
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| 650 |
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0 |
|a Logic design.
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| 650 |
1 |
4 |
|a Circuits and Systems.
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| 650 |
2 |
4 |
|a Processor Architectures.
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| 650 |
2 |
4 |
|a Logic Design.
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| 700 |
1 |
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|a Coussy, Philippe.
|e editor.
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| 700 |
1 |
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|a Morawiec, Adam.
|e editor.
|
| 710 |
2 |
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|a SpringerLink (Online service)
|
| 773 |
0 |
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|t Springer eBooks
|