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03474nam a22004095i 4500 |
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000285170 |
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20210511133405.0 |
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cr nn 008mamaa |
| 008 |
130620s2013 xxu| s |||| 0|eng d |
| 020 |
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|a 9781461468592
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| 024 |
7 |
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|a 10.1007/978-1-4614-6859-2
|2 doi
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| 040 |
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|a Sistema de Bibliotecas del Tecnológico de Costa Rica
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| 245 |
1 |
0 |
|a Handbook of Signal Processing Systems /
|c edited by Shuvra S. Bhattacharyya, Ed F. Deprettere, Rainer Leupers, Jarmo Takala.
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| 250 |
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|a 2nd ed. 2013.
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| 260 |
# |
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|a New York, NY :
|b Springer New York :
|b Imprint: Springer,
|c 2013.
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| 300 |
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|a XXI, 1399 p. 708 illus. :
|b online resource.
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| 336 |
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|a text
|b txt
|2 rdacontent
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| 337 |
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|a computer
|b c
|2 rdamedia
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| 338 |
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|a online resource
|b cr
|2 rdacarrier
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| 505 |
0 |
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|a Part I: Applications -- Signal Processing for Stereoscopic and Multiview 3D Displays -- Video Compression -- Inertial Sensors and their Applications -- Finding it Now: Construction and Configuration of Networked Classifiers in Real-Time Stream Mining Systems -- High-Energy Physics -- Signal Processing for Wireless Transceivers -- Signal Processing for Cryptography and Security Applications -- Digital Signal Processing in Home Entertainment -- Signal Processing for Control -- MPEG Reconfigurable Video Coding -- Signal Processing for High-Speed Links -- Medical Image Processing -- Low-power Wireless Sensor Network Platforms -- Signal Processing Tools for Radio Astronomy -- Distributed Smart Cameras and Distributed Computer Vision -- Part II: Architectures -- Architectures for Stereo Vision -- Multicore Systems on Chip -- Coarse-Grained Reconfigurable Array Architectures -- Arithmetic -- Architectures for Particle Filtering -- Application Specific Instruction Set DSP Processors -- FPGA-Based DSP -- Application Specific Accelerators for Communications -- General-Purpose DSP Processors -- Mixed Signal Techniques -- DSP Systems using Three-Dimensional Integration Technology -- Part III: Design Methods and Tools -- Methods and Tools for Mapping Process Networks onto Multi-Processor Systems-On-Chip -- Dynamic Dataflow Graphs -- DSP Instruction Set Simulation -- Integrated Modeling using Finite State Machines and Dataflow Graphs -- C Compilers and Code Optimization -- Kahn Process Networks and a Reactive Extension -- Decidable Dataflow Models for Signal Processing -- Systolic Arrays -- Multidimensional Dataflow Graphs -- Compiling for VLIW DSPs -- Software Compilation Techniques for MPSoCs -- Embedded C for Digital Signal Processing -- Signal Flow Graphs and Data Flow Graphs -- Optimization of Number Representations -- Polyhedral Process Networks -- Mapping Decidable Signal Processing Graphs into FPGA Implementations.
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| 650 |
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0 |
|a Signal processing.
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| 650 |
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0 |
|a Image processing.
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| 650 |
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0 |
|a Speech processing systems.
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| 650 |
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0 |
|a Electrical engineering.
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| 650 |
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0 |
|a Computer organization.
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| 650 |
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0 |
|a Microprocessors.
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| 650 |
1 |
4 |
|a Signal, Image and Speech Processing.
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| 650 |
2 |
4 |
|a Communications Engineering, Networks.
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| 650 |
2 |
4 |
|a Computer Systems Organization and Communication Networks.
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| 650 |
2 |
4 |
|a Processor Architectures.
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| 700 |
1 |
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|a Bhattacharyya, Shuvra S.
|e editor.
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| 700 |
1 |
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|a Deprettere, Ed F.
|e editor.
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| 700 |
1 |
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|a Leupers, Rainer.
|e editor.
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| 700 |
1 |
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|a Takala, Jarmo.
|e editor.
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| 710 |
2 |
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|a SpringerLink (Online service)
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| 773 |
0 |
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|t Springer eBooks
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| 900 |
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|a Libro descargado a ALEPH en bloque (proveniente de proveedor)
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