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| LEADER |
02777nam a22003375i 4500 |
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000285261 |
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20210507095922.0 |
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cr nn 008mamaa |
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130502s2013 xxu| s |||| 0|eng d |
| 020 |
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|a 9781461417910
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| 024 |
7 |
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|a 10.1007/978-1-4614-1791-0
|2 doi
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| 040 |
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|a Sistema de Bibliotecas del Tecnológico de Costa Rica
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| 245 |
1 |
0 |
|a High-Performance Computing Using FPGAs /
|c edited by Wim Vanderbauwhede, Khaled Benkrid.
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| 250 |
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|a 1st ed. 2013.
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| 260 |
# |
# |
|a New York, NY :
|b Springer New York :
|b Imprint: Springer,
|c 2013.
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| 300 |
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|a XI, 803 p. 232 illus. :
|b online resource.
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| 336 |
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|a text
|b txt
|2 rdacontent
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| 337 |
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|a computer
|b c
|2 rdamedia
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| 338 |
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|a online resource
|b cr
|2 rdacarrier
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| 505 |
0 |
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|a High-Performance Hardware Acceleration of Asset Simulations -- Monte Carlo Simulation based Financial Computing on the Maxwell FPGA Parallel Machine -- Bioinformatics Applications on the FPGA-based High-Performance Computer RIVYERA -- FPGA-Accelerated Molecular Dynamics -- FPGA-based HPRC for Bioinformatics Applications -- High-Performance Computing for Neuroinformatics using FPGA -- High-Performance FPGA-Accelerated Real-time Search -- High-Performance Data Processing over N-ary Trees -- FPGA-based Systolic Computational-Memory Array for Scalable Stencil Computations -- High performance implementation of RTM seismic modeling on FPGAs: architecture, arithmetic and power issues -- High-Performance Cryptanalysis on RIVYERA and COPACOBANA Computing Systems -- FPGA-based HPRC Systems for Scientific Applications -- Accelerating the SPICE Circuit Simulator using an FPGA - A Case Study -- The Convey Hybrid-Core Architecture -- Low Cost High Performance Reconfigurable Computing -- An FPGA-based supercomputer for statistical physics: the weird case of Janus -- Accelerate Communication, not Computation! -- High-speed torus interconnect using FPGAs -- MEMSCALE: Re-architecting memory resources for clusters -- High-performance computing based on high-speed dynamic reconfiguration -- Reconfigurable arithmetic for HPC -- Acceleration of the Discrete Element Method: From RTL to C-Based Design -- Optimising Euroben Kernels on Maxwell -- Assessing Productivity of High-Level Design Methodologies for High-Performance Reconfigurable Computers -- Maximum performance computing with dataflow engines.
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| 650 |
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0 |
|a Electronic circuits.
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| 650 |
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0 |
|a Microprocessors.
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| 650 |
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0 |
|a Information theory.
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| 650 |
1 |
4 |
|a Circuits and Systems.
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| 650 |
2 |
4 |
|a Processor Architectures.
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| 650 |
2 |
4 |
|a Information and Communication, Circuits.
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| 650 |
2 |
4 |
|a Electronic Circuits and Devices.
|
| 700 |
1 |
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|a Vanderbauwhede, Wim.
|e editor.
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| 700 |
1 |
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|a Benkrid, Khaled.
|e editor.
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| 710 |
2 |
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|a SpringerLink (Online service)
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| 773 |
0 |
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|t Springer eBooks
|