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03443nam a22004335i 4500 |
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000285557 |
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20210511142835.0 |
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cr nn 008mamaa |
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100917s2010 xxu| s |||| 0|eng d |
| 020 |
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|a 9781441963451
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| 024 |
7 |
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|a 10.1007/978-1-4419-6345-1
|2 doi
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| 040 |
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|a Sistema de Bibliotecas del Tecnológico de Costa Rica
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| 245 |
1 |
0 |
|a Handbook of Signal Processing Systems /
|c edited by Shuvra S. Bhattacharyya, Ed F. Deprettere, Rainer Leupers, Jarmo Takala.
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| 250 |
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|a 1st ed. 2010.
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| 260 |
# |
# |
|a New York, NY :
|b Springer US :
|b Imprint: Springer,
|c 2010.
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| 300 |
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|a XXXVIII, 1117 p. 100 illus. :
|b online resource.
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| 336 |
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|a text
|b txt
|2 rdacontent
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| 337 |
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|a computer
|b c
|2 rdamedia
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| 338 |
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|a online resource
|b cr
|2 rdacarrier
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| 505 |
0 |
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|a Applications Managing Editor: Shuvra Bhattacharyya -- Signal Processing for Control -- Digital Signal Processing in Home Entertainment -- MPEG Reconfigurable Video Coding -- Signal Processing for High-Speed Links -- Video Compression -- Low-power Wireless Sensor Network Platforms -- Signal Processing for Cryptography and Security Applications -- High-Energy Physics -- Medical Image Processing -- Signal Processing for Audio HCI -- Distributed Smart Cameras and Distributed Computer Vision -- Architectures Managing Editor: Jarmo Takala -- Arithmetic -- Application-Specific Accelerators for Communications -- FPGA-based DSP -- General-Purpose DSP Processors -- Application Specific Instruction Set DSP Processors -- Coarse-Grained Reconfigurable Array Architectures -- Multi-core Systems on Chip -- DSP Systems using Three-Dimensional (3D) Integration Technology -- Mixed Signal Techniques -- Programming and Simulation Tools Managing Editor: Rainer Leupers -- C Compilers and Code Optimization for DSPs -- Compiling for VLIW DSPs -- Software Compilation Techniques for MPSoCs -- DSP Instruction Set Simulation -- Optimization of Number Representations -- Intermediate Representations for Simulation and Implementation -- Embedded C for Digital Signal Processing -- Design Methods Managing Editor: Ed Deprettere -- Signal Flow Graphs and Data Flow Graphs -- Systolic Arrays -- Decidable Signal Processing Dataflow Graphs: Synchronous and Cyclo-Static Dataflow Graphs -- Mapping Decidable Signal Processing Graphs into FPGA Implementations -- Dynamic and Multidimensional Dataflow Graphs -- Polyhedral Process Networks -- Kahn Process Networks and a Reactive Extension -- Methods and Tools for Mapping Process Networks onto Multi-Processor Systems-On-Chip -- Integrated Modeling using Finite State Machines and Dataflow Graphs.
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| 650 |
|
0 |
|a Signal processing.
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| 650 |
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0 |
|a Image processing.
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| 650 |
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0 |
|a Speech processing systems.
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| 650 |
|
0 |
|a Data structures (Computer science).
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| 650 |
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0 |
|a Electrical engineering.
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| 650 |
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0 |
|a Computer organization.
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| 650 |
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0 |
|a Microprocessors.
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| 650 |
1 |
4 |
|a Signal, Image and Speech Processing.
|
| 650 |
2 |
4 |
|a Data Structures.
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| 650 |
2 |
4 |
|a Communications Engineering, Networks.
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| 650 |
2 |
4 |
|a Computer Systems Organization and Communication Networks.
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| 650 |
2 |
4 |
|a Processor Architectures.
|
| 700 |
1 |
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|a Bhattacharyya, Shuvra S.
|e editor.
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| 700 |
1 |
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|a Deprettere, Ed F.
|e editor.
|
| 700 |
1 |
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|a Leupers, Rainer.
|e editor.
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| 700 |
1 |
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|a Takala, Jarmo.
|e editor.
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| 710 |
2 |
|
|a SpringerLink (Online service)
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| 773 |
0 |
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|t Springer eBooks
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| 900 |
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|a Libro descargado a ALEPH en bloque (proveniente de proveedor)
|