On and Off-Chip Crosstalk Avoidance in VLSI Design /
| Autores principales: | , |
|---|---|
| Autor Corporativo: | |
| Formato: | eBook |
| Lenguaje: | English |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2010.
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| Edición: | 1st ed. 2010. |
| Materias: |
Tabla de Contenidos:
- On-Chip Crosstalk and Avoidance
- of On-Chip Crosstalk Avoidance
- Preliminaries to On-chip Crosstalk
- Memoryless Crosstalk Avoidance Codes
- CODEC Designs for Memoryless Crosstalk Avoidance Codes
- Memory-based Crosstalk Avoidance Codes
- Multi-valued Logic Crosstalk Avoidance Codes
- Summary of On-Chip Crosstalk Avoidance
- Off-Chip Crosstalk and Avoidance
- to Off-Chip Crosstalk
- Package Construction and Electrical Modeling
- Preliminaries and Terminology
- Analytical Model for Off-Chip Bus Performance
- Optimal Bus Sizing
- Bus Expansion Encoder
- Bus Stuttering Encoder
- Impedance Compensation
- Future Trends and Applications
- Summary of Off-Chip Crosstalk Avoidance.