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100301s2009 ne | s |||| 0|eng d |
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|a 9781402097577
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024 |
7 |
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|a 10.1007/978-1-4020-9757-7
|2 doi
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040 |
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|a Sistema de Bibliotecas del Tecnológico de Costa Rica
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100 |
1 |
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|a Murali, Srinivasan.
|e author.
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|a Designing Reliable and Efficient Networks on Chips /
|c by Srinivasan Murali.
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250 |
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|a 1st ed. 2009.
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260 |
# |
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|a Dordrecht :
|b Springer Netherlands :
|b Imprint: Springer,
|c 2009.
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300 |
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|a X, 198 p. :
|b online resource.
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336 |
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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1 |
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|a Lecture Notes in Electrical Engineering,
|v 34
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|a NoC Design Methods -- Designing Crossbar Based Systems -- Netchip Tool Flow for NoC Design -- Designing Standard Topologies -- Designing Custom Topologies -- Supporting Multiple Applications -- Supporting Dynamic Application Patterns -- NoC Reliability Mechanisms -- Timing-Error Tolerant NoC Design -- Analysis of NoC Error Recovery Schemes -- Fault-Tolerant Route Generation -- NoC Support for Reliable On-Chip Memories -- Conclusions and Future Directions.
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650 |
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|a Electronic circuits.
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|a Power electronics.
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650 |
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|a Microprocessors.
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4 |
|a Circuits and Systems.
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2 |
4 |
|a Power Electronics, Electrical Machines and Networks.
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650 |
2 |
4 |
|a Processor Architectures.
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710 |
2 |
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|a SpringerLink (Online service)
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773 |
0 |
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|t Springer eBooks
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900 |
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|a Libro descargado a ALEPH en bloque (proveniente de proveedor)
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