Designing Reliable and Efficient Networks on Chips /

Detalles Bibliográficos
Autor principal: Murali, Srinivasan. (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: eBook
Lenguaje:English
Publicado: Dordrecht : Springer Netherlands : Imprint: Springer, 2009.
Edición:1st ed. 2009.
Colección:Lecture Notes in Electrical Engineering, 34
Materias:
Tabla de Contenidos:
  • NoC Design Methods
  • Designing Crossbar Based Systems
  • Netchip Tool Flow for NoC Design
  • Designing Standard Topologies
  • Designing Custom Topologies
  • Supporting Multiple Applications
  • Supporting Dynamic Application Patterns
  • NoC Reliability Mechanisms
  • Timing-Error Tolerant NoC Design
  • Analysis of NoC Error Recovery Schemes
  • Fault-Tolerant Route Generation
  • NoC Support for Reliable On-Chip Memories
  • Conclusions and Future Directions.