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04178nam a22003735i 4500 |
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000283555 |
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20211103134234.0 |
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100301s2008 ne | s |||| 0|eng d |
020 |
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|a 9781402064883
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024 |
7 |
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|a 10.1007/978-1-4020-6488-3
|2 doi
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040 |
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|a Sistema de Bibliotecas del Tecnológico de Costa Rica
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245 |
1 |
0 |
|a Design, Automation, and Test in Europe :
|b The Most Influential Papers of 10 Years DATE /
|c edited by Rudy Lauwereins, Jan Madsen.
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250 |
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|a 1st ed. 2008.
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260 |
# |
# |
|a Dordrecht :
|b Springer Netherlands :
|b Imprint: Springer,
|c 2008.
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300 |
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|a XII, 516 p. :
|b online resource.
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336 |
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|a text
|b txt
|2 rdacontent
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337 |
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|a computer
|b c
|2 rdamedia
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338 |
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|a online resource
|b cr
|2 rdacarrier
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505 |
0 |
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|a System Level Design -- System Level Design: Past, Present, and Future -- Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems -- EXPRESSION: A Language for Architecture Exploration Through Compiler/Simulator Retargetability -- RTOS Modeling for System Level Design -- Context-Aware Performance Analysis for Efficient Embedded System Design -- Lock-Free Synchronization for Dynamic Embedded Real-Time Systems -- What If You Could Design Tomorrow’s System Today? -- Networks on Chip -- Networks on Chips -- A Generic Architecture for On-Chip Packet-Switched Interconnections -- Trade-offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip -- Exploiting the Routing Flexibility for Energy/Performance-Aware Mapping of Regular NoC Architectures -- xpipesCompiler: A Tool for Instantiating Application-Specific Networks on Chip -- A Network Traffic Generator Model for Fast Network-on-Chip Simulation -- Modeling, Simulation and Run-Time Management -- Modeling, Simulation and Run-Time Management -- Dynamic Power Management for Nonstationary Service Requests -- Quantitative Comparison of Power Management Algorithms -- Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives -- Statistical Blockade: A Novel Method for Very Fast Monte Carlo Simulation of Rare Circuit Events, and its Application -- Compositional Specification of Behavioral Semantics -- Design Technology for Advanced Digital Systems in CMOS and Beyond -- Design Technology for Advanced Digital Systems in CMOS and Beyond -- Address Bus Encoding Techniques for System-Level Power Optimization -- MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis -- Minimum Energy Fixed-Priority Scheduling for Variable Voltage Processors -- Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies -- Physical Design and Validation -- Physical Design and Validation -- Interconnect Tuning Strategies for High-Performance ICs -- Efficient Inductance Extraction via Windowing -- Soft-Error Tolerance Analysis and Optimization of Nanometer Circuits -- A Single Photon Avalanche Diode Array Fabricated in Deep-Submicron CMOS Technology -- Test and Verification -- The Test and Verification Influential Papers in the 10 Years of DATE -- Cost Reduction and Evaluation of a Temporary Faults-Detecting Technique -- An Integrated System-on-Chip Test Framework -- Efficient Spectral Techniques for Sequential ATPG -- BerkMin: A Fast and Robust Sat-Solver -- Improving Compression Ratio, Area Overhead, and Test Application Time for System-on-Chip Test Data Compression/Decompression -- An Effective Technique for Minimizing the Cost of Processor Software-Based Diagnosis in SoCs.
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650 |
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0 |
|a Electronic circuits.
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650 |
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0 |
|a Electronics.
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650 |
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0 |
|a Microelectronics.
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650 |
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0 |
|a Computer hardware.
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650 |
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0 |
|a Computer organization.
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650 |
1 |
4 |
|a Circuits and Systems.
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650 |
2 |
4 |
|a Electronics and Microelectronics, Instrumentation.
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650 |
2 |
4 |
|a Computer Hardware.
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650 |
2 |
4 |
|a Computer Systems Organization and Communication Networks.
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700 |
1 |
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|a Lauwereins, Rudy.
|e editor.
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700 |
1 |
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|a Madsen, Jan.
|e editor.
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710 |
2 |
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|a SpringerLink (Online service)
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773 |
0 |
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|t Springer eBooks
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900 |
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|a Libro descargado a ALEPH en bloque (proveniente de proveedor)
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