Network-on-Chip Architectures : A Holistic Design Exploration /

Bibliographic Details
Main Authors: Nicopoulos, Chrysostomos. (Author), Narayanan, Vijaykrishnan. (Author), Das, Chita R. (Author)
Corporate Author: SpringerLink (Online service)
Format: eBook
Language:English
Published: Dordrecht : Springer Netherlands : Imprint: Springer, 2010.
Edition:1st ed. 2010.
Series:Lecture Notes in Electrical Engineering, 45
Subjects:
Table of Contents:
  • MICRO-Architectural Exploration
  • A Baseline NoC Architecture
  • ViChaR: A Dynamic Virtual Channel Regulator for NoC Routers [39]
  • RoCo: The Row-Column Decoupled Router - A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks [40]
  • Exploring FaultoTolerant Network-on-Chip Architectures [37]
  • On the Effects of Process Variation in Network-on-Chip Architectures [45]
  • MACRO-Architectural Exploration
  • The Quest for Scalable On-Chip Interconnection Networks: Bus/NoC Hybridization [15]
  • Design and Management of 3D Chip Multiprocessors Using Network-In-Memory (NetInMem) [43]
  • A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures [44]
  • Digest of Additional NoC MACRO-Architectural Research
  • Conclusions and Future Work.