Nanopackaging Nanotechnologies and Electronics Packaging /

Detalles Bibliográficos
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Morris, James E. (Editor )
Formato: eBook
Lenguaje:English
Publicado: New York, NY : Springer US : Imprint: Springer, 2008.
Edición:1st ed. 2008.
Materias:
Acceso en línea:https://doi.org/10.1007/978-0-387-47325-3
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024 7 |a 10.1007/978-0-387-47325-3  |2 doi 
040 |a Sistema de Bibliotecas del Tecnológico de Costa Rica 
245 1 0 |a Nanopackaging  |b Nanotechnologies and Electronics Packaging /  |c edited by James E. Morris. 
250 |a 1st ed. 2008. 
260 # # |a New York, NY :  |b Springer US :  |b Imprint: Springer,  |c 2008. 
300 |a XXI, 543 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
505 0 |a Nanopackaging: Nanotechnologies and Electronics Packaging -- Modelling Technologies and Applications -- Application of Molecular Dynamics Simulation in Electronic Packaging -- Advances in Delamination Modeling -- Nanoparticle Properties -- Nanoparticle Fabrication -- Nanoparticle-Based High-k Dielectric Composites: Opportunities and Challenges -- Nanostructured Resistor Materials -- Nanogranular Magnetic Core Inductors: Design, Fabrication, and Packaging -- Nanoconductive Adhesives -- Nanoparticles in Microvias -- Materials and Technology for Conductive Microstructures -- A Study of Nanoparticles in SnAg-Based Lead-Free Solders -- Nano-Underfills for Fine-Pitch Electronics -- Carbon Nanotubes: Synthesis and Characterization -- Characteristics of Carbon Nanotubes for Nanoelectronic Device Applications -- Carbon Nanotubes for Thermal Management of Microsystems -- Electromagnetic Shielding of Transceiver Packaging Using Multiwall Carbon Nanotubes -- Properties of 63Sn-37Pb and Sn-3.8Ag-0.7Cu Solders Reinforced With Single-Wall Carbon Nanotubes -- Nanowires in Electronics Packaging -- Design and Development of Stress-Engineered Compliant Interconnect for Microelectronic Packaging -- Flip Chip Packaging for Nanoscale Silicon Logic Devices: Challenges and Opportunities -- Nanoelectronics Landscape: Application, Technology, and Economy -- Errata. 
650 0 |a Nanotechnology. 
650 0 |a Electrochemistry. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 1 4 |a Nanotechnology. 
650 2 4 |a Electrochemistry. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
700 1 |a Morris, James E.  |e editor. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
856 4 0 |u https://doi.org/10.1007/978-0-387-47325-3