Power Distribution Networks with On-Chip Decoupling Capacitors
| Autores principales: | , , |
|---|---|
| Autor Corporativo: | |
| Formato: | eBook |
| Lenguaje: | English |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2008.
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| Edición: | 1st ed. 2008. |
| Materias: | |
| Acceso en línea: | https://doi.org/10.1007/978-0-387-71601-5 |
Tabla de Contenidos:
- Inductive Properties of Electric Circuits
- Properties of On-Chip Inductive Current Loops
- Electromigration
- High Performance Power Distribution Systems
- Decoupling Capacitance
- On-Chip Power Distribution Networks
- Computer-Aided Design and Analysis
- Inductive Properties of On-Chip Power Distribution Grids
- Variation of Grid Inductance with Frequency
- Inductance/Area/Resistance Tradeoffs
- Scaling Trends of On-Chip Power Distribution Noise
- Impedance Characteristics of Multi-Layer Grids
- Multiple On-Chip Power Supply Systems
- On-Chip Power Distribution Grids with Multiple Supply Voltages
- Decoupling Capacitors for Multi-Voltage Power Distribution Systems
- On-chip Power Noise Reduction Techniques in High Performance ICs
- Effective Radii of On-Chip Decoupling Capacitors
- Efficient Placement of Distributed On-Chip Decoupling Capacitors
- Impedance/Noise Issues in On-Chip Power Distribution Networks
- Conclusions.