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01616nam a22003375i 4500 |
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20210416155302.0 |
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130507s2013 xxu| s |||| 0|eng d |
| 020 |
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|a 9781461432692
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| 024 |
7 |
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|a 10.1007/978-1-4614-3269-2
|2 doi
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| 040 |
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|a Sistema de Bibliotecas del Tecnológico de Costa Rica
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| 100 |
1 |
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|a Gangadharan, Sridhar.
|e author.
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| 245 |
1 |
0 |
|a Constraining Designs for Synthesis and Timing Analysis :
|b A Practical Guide to Synopsys Design Constraints (SDC) /
|c by Sridhar Gangadharan, Sanjay Churiwala.
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| 250 |
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|a 1st ed. 2013.
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| 260 |
# |
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|a New York, NY :
|b Springer New York :
|b Imprint: Springer,
|c 2013.
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| 300 |
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|a XXVII, 226 p. :
|b online resource.
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| 336 |
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|a text
|b txt
|2 rdacontent
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| 337 |
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|a computer
|b c
|2 rdamedia
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| 338 |
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|a online resource
|b cr
|2 rdacarrier
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| 505 |
0 |
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|a Introduction -- Synthesis Basics -- Timing Analysis and Constraints -- SDC Extensions through Tcl -- Clocks -- Generated Clocks -- Clock Groups -- Other Clock Characteristics -- Port Delays -- Completing Port Constraints -- False Paths -- Multi Cycle Paths -- Combinatorial Paths -- Modal Analysis -- Managing Your Constraints -- Miscellaneous SDC Commands -- XDC: Xilinx Extensions To SDC.
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| 650 |
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|a Electronic circuits.
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| 650 |
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|a Electronics.
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| 650 |
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|a Microelectronics.
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| 650 |
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|a Microprocessors.
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| 650 |
1 |
4 |
|a Circuits and Systems.
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| 650 |
2 |
4 |
|a Electronics and Microelectronics, Instrumentation.
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| 650 |
2 |
4 |
|a Processor Architectures.
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| 700 |
1 |
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|a Churiwala, Sanjay.
|e author.
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| 710 |
2 |
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|a SpringerLink (Online service)
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| 773 |
0 |
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|t Springer eBooks
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