Low-Power High-Level Synthesis for Nanoscale CMOS Circuits

Detalles Bibliográficos
Autores principales: Mohanty, Saraju P. (Autor), Ranganathan, Nagarajan. (Autor), Kougianos, Elias. (Autor), Patra, Priyardarsan. (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: eBook
Lenguaje:English
Publicado: New York, NY : Springer US : Imprint: Springer, 2008.
Edición:1st ed. 2008.
Materias:
Acceso en línea:https://doi.org/10.1007/978-0-387-76474-0
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100 1 |a Mohanty, Saraju P.  |e author. 
245 1 0 |a Low-Power High-Level Synthesis for Nanoscale CMOS Circuits  |c by Saraju P. Mohanty, Nagarajan Ranganathan, Elias Kougianos, Priyardarsan Patra. 
250 |a 1st ed. 2008. 
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300 |a XXXII, 302 p. 20 illus.  |b online resource. 
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505 0 |a High-Level Synthesis Fundamentals -- Power Modeling and Estimation at Transistor and Logic Gate Levels -- Architectural Power Modeling and Estimation -- Power Reduction Fundamentals -- Energy or Average Power Reduction -- Peak Power Reduction -- Transient Power Reduction -- Leakage Power Reduction -- Conclusions and Future Direction. 
650 0 |a Electronic circuits. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 0 |a Computer-aided engineering. 
650 0 |a Computer hardware. 
650 0 |a Electrical engineering. 
650 1 4 |a Circuits and Systems. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
650 2 4 |a Computer-Aided Engineering (CAD, CAE) and Design. 
650 2 4 |a Computer Hardware. 
650 2 4 |a Electrical Engineering. 
700 1 |a Ranganathan, Nagarajan.  |e author. 
700 1 |a Kougianos, Elias.  |e author. 
700 1 |a Patra, Priyardarsan.  |e author. 
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