Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Autores principales: | Mohanty, Saraju P. (Autor), Ranganathan, Nagarajan. (Autor), Kougianos, Elias. (Autor), Patra, Priyardarsan. (Autor) |
---|---|
Autor Corporativo: | SpringerLink (Online service) |
Formato: | eBook |
Lenguaje: | English |
Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2008.
|
Edición: | 1st ed. 2008. |
Materias: | |
Acceso en línea: | https://doi.org/10.1007/978-0-387-76474-0 |
Ejemplares similares
-
CMOS Active Inductors and Transformers : Principle, Implementation, and Applications /
por: Yuan, Fei.
Publicado: (2008) -
Standardized Functional Verification
por: Wiemann, Alan.
Publicado: (2008) -
Timing Optimization Through Clock Skew Scheduling
por: Kourtev, Ivan S., et al.
Publicado: (2009) -
Quantifying and Exploring the Gap Between FPGAs and ASICs /
por: Kuon, Ian., et al.
Publicado: (2010) -
Nanometer Technology Designs High-Quality Delay Tests /
por: Ahmed, Nisar.
Publicado: (2008)