System-on-chip test architectures : nanometer design for testability /

System-on-chip test architectures : nanometer design for testability /

Bibliographic Details
Other Authors: Laung-Terng, Wang (Editor, Editor/a), Stroud, Charles E. (Editor, Editor/a), Touba, Nur A. (Editor, Editor/a)
Format: Book
Language:English
Published: Amsterdam : Elsevier, c2008.
Series:The Morgan Kaufmann Series in Systems on Silicon / series editor Wayne Wolf, Georgia Institute of Technology
Subjects:
CIRCUITOS INTEGRADOS
CIRCUITOS INTEGRADOS DIGITALES
CIRCUITOS VLSI
TRANSISTORES

Sistema de Bibliotecas de Universidad de Costa Rica

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Call Number: 621.395
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