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| LEADER |
01210nam a2200325 u 4500 |
| 001 |
000186451 |
| 005 |
20170707154601.0 |
| 008 |
080922s2008 fs ||||| eng |
| 020 |
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|a 9780123739735
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| 035 |
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|a 9158663
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| 040 |
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|a Sistema de Bibliotecas de la Universidad de Costa Rica
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| 041 |
0 |
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|a eng
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| 082 |
0 |
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|a 621.395
|b S999s
|2 22
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| 245 |
0 |
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|a System-on-chip test architectures :
|b nanometer design for testability /
|c edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba.
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| 260 |
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|a Amsterdam :
|b Elsevier,
|c c2008.
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| 300 |
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|a xxxiii, 856 páginas :
|b ilustraciones.
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| 490 |
0 |
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|a The Morgan Kaufmann Series in Systems on Silicon / series editor Wayne Wolf, Georgia Institute of Technology
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| 500 |
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|a Impreso en Estados Unidos
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| 650 |
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|a CIRCUITOS INTEGRADOS
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| 650 |
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|a CIRCUITOS INTEGRADOS DIGITALES
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| 650 |
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|a CIRCUITOS VLSI
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| 650 |
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|a TRANSISTORES
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| 700 |
1 |
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|a Laung-Terng, Wang
|e Editor/a
|4 edt
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| 700 |
1 |
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|a Stroud, Charles E.
|e Editor/a
|4 edt
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| 700 |
1 |
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|a Touba, Nur A.
|e Editor/a
|4 edt
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| 900 |
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|a 2008
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| 912 |
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|a 17-OCT-2008 - SANCHEZ VELASQUEZ, AURA
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| 917 |
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|a 22-SEP-2008 - BUSTAMANTE MORA, CYNTHIA
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| 949 |
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|a ASV -SVZ
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| 916 |
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|a Centro Catalográfico
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