CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies : Process-Aware SRAM Design and Test /

Detalles Bibliográficos
Autores principales: Pavlov, Andrei. (Autor), Sachdev, Manoj. (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: eBook
Lenguaje:English
Publicado: Dordrecht : Springer Netherlands : Imprint: Springer, 2008.
Edición:1st ed. 2008.
Colección:Frontiers in Electronic Testing, 40
Materias:
LEADER 01503nam a22003255i 4500
001 000276839
005 20211027083701.0
007 cr nn 008mamaa
008 100301s2008 ne | s |||| 0|eng d
020 |a 9781402083631 
024 7 |a 10.1007/978-1-4020-8363-1  |2 doi 
040 |a Sistema de Bibliotecas del Tecnológico de Costa Rica 
100 1 |a Pavlov, Andrei.  |e author. 
245 1 0 |a CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies :  |b Process-Aware SRAM Design and Test /  |c by Andrei Pavlov, Manoj Sachdev. 
250 |a 1st ed. 2008. 
260 # # |a Dordrecht :  |b Springer Netherlands :  |b Imprint: Springer,  |c 2008. 
300 |a XVI, 194 p. :  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
490 1 |a Frontiers in Electronic Testing,  |v 40 
505 0 |a and Motivation -- SRAM Circuit Design and Operation -- SRAM Cell Stability: Definition, Modeling and Testing -- Traditional SRAM Fault Models and Test Practices -- Techniques for Detection of SRAM Cells with Stability Faults -- Soft Errors in SRAMs: Sources, Mechanisms and Mitigation Techniques. 
650 0 |a Electronic circuits. 
650 0 |a Computer memory systems. 
650 1 4 |a Circuits and Systems. 
650 2 4 |a Memory Structures. 
700 1 |a Sachdev, Manoj.  |e author. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
900 |a Libro descargado a ALEPH en bloque (proveniente de proveedor)