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02100nam a22004215i 4500 |
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978-0-387-76534-1 |
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20191022002732.0 |
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cr nn 008mamaa |
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100301s2008 xxu| s |||| 0|eng d |
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|a 9780387765341
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|a 10.1007/978-0-387-76534-1
|2 doi
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|a Sistema de Bibliotecas del Tecnológico de Costa Rica
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|a Wafer Level 3-D ICs Process Technology
|c edited by Chuan Seng Tan, Ronald J. Gutmann, L. Rafael Reif.
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|a 1st ed. 2008.
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|a New York, NY :
|b Springer US :
|b Imprint: Springer,
|c 2008.
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|a XII, 410 p.
|b online resource.
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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|a Integrated Circuits and Systems,
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|a Overview of Wafer-Level 3D ICs -- Monolithic 3D Integrated Circuits -- Stacked CMOS Technologies -- Wafer-Bonding Technologies and Strategies for 3D ICs -- Through-Silicon Via Fabrication, Backgrind, and Handle Wafer Technologies -- Cu Wafer Bonding for 3D IC Applications -- Cu/Sn Solid#x2013;Liquid Interdiffusion Bonding -- An SOI-Based 3D Circuit Integration Technology -- 3D Fabrication Options for High-Performance CMOS Technology -- 3D Integration Based upon Dielectric Adhesive Bonding -- Direct Hybrid Bonding -- 3D Memory -- Circuit Architectures for 3D Integration -- Thermal Challenges of 3D ICs -- Status and Outlook.
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|a Electronics.
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|a Microelectronics.
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|a Optical materials.
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|a Electronic materials.
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|a Materials-Surfaces.
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|a Thin films.
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|a Engineering.
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|a Electronics and Microelectronics, Instrumentation.
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|a Optical and Electronic Materials.
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|a Surfaces and Interfaces, Thin Films.
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|a Engineering, general.
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|a Tan, Chuan Seng.
|e editor.
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|a Gutmann, Ronald J.
|e editor.
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|a Reif, L. Rafael.
|e editor.
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|a SpringerLink (Online service)
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|t Springer eBooks
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|u https://doi.org/10.1007/978-0-387-76534-1
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